The present disclosure relates to buffering ahead of a shared resource, such as a switch, in particular a crossbar switch.
When switching or moving digital data in a crossbar switch, blockages may occur between the input and output, or source and destination. For instance, if data at two inputs is to be routed to a shared output, one of the data has to wait until the other is processed at the output.
If, behind the data that is caused to wait, there is further data that is destined for another output that is free, the further data will be blocked for that clock cycle and the resources of the switch will be underused.
In order to avoid such blocking and to maximise use of the system's resources, the blocked data can be buffered, and a decision made in the next cycle as to whether it is then processed. However, buffers are expensive in terms of resource (e.g. chip area) and power consumption. Hence it is desirable to minimise their use without compromising system performance.
The present disclosure aims to improve the use of buffering.